Dr. Geoff Knagge

Dr. Geoff Knagge received the B. Comp. Sci degree (2001) and B.E. (Hons I) in Computer Engineering (2002) from the University of Newcastle, Australia. He was also awarded his PhD by the University of Newcastle in 2007, and also received the Faculty award for Research Higher Degree Excellence for his thesis work.

His research primarily focuses on the development and optimisation of algorithms for implementation in VLSI devices, including ASICs and FPGAs. This applies to applications to a diverse range of problems, including baseband processing for digital wireless communications technologies, and model predictive control. He is an author on 2 journal articles, 8 published conference papers, 1 US patent, and an additional pending patent.

Geoff's thesis covered topics in the following general areas:

• Digital VLSI implementations and low power techniques
• Practical algorithms for digital communications and improving feasibility VLSI implementation
• Near optimal algorithms for combinatorial optimisation in VLSI, with application to multiuser detection and MIMO.

Specifically, the major component involved developing a VLSI solution for higher order detection problems, using an optimised low-computation "spherical" based search. As a proof of concept, an ASIC design for an 8x8 MIMO detector was created, synthesised, and routed, although the device has not yet been fabricated.

His current work is with the Model-Predictive Control project, and extending his postgraduate work that dealt with combinatorial optimisation in VLSI. Part of this has involved the development of the c4Hardware and c4HDL projects to assist in the modelling of hardware designs for the MPC project.

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