Algorithms to ASICs
Dr. Geoff Knagge
+61 (0)2 49 215227
+61 (0)2 49 216993
Building EE: EEG05
These projects are focussed on providing software solutions to assist the mapping of algorithmic solutions to actual implementations in hardware devices. This includes bit accurate modelling of numerical systems in limited precision, analysis of those simulations, and generation of test data for verification with the hardware implementations in ASICs and FPGAs.
The individual components of this project are described below.
c4Hardware is a highly flexible library of C++ classes, available for free download, for the emulation of hardware implementations of algorithms. It provides a high level interface to matrix, vector, and scalar operations to allow rapid application development without requiring knowledge of the underlying operations. Futhermore, it allows custom data types to be plugged-in with little change to the high level application. This allows bit-accurate modelling and analysis of algorithms under various limited precision numerical representations. c4Hardware programs may be either standalone execuatables, or coded as MEX functions for interfacing with MATLAB.
c4HDL is a library of C++ classes, available for free download, that provides bit-accurate modelling of integer, floating point, and fixed point data types, for matching with HDL code. Key points include :
- Allows modelling from very small to very large numerical precision
- Models can be directly used for generating testbench data to verify the operation of HDL models of the algorithm.
- Contains and generates matching C++ and VHDL models of some arithmetic hardware components
While designed as a plug-in for c4Hardware, this library may also be used as a standalone item.
SBAM is a series of libraries that enable high level algorithms to be easily simulated in various reduced precision number formats. Support is provided to enable porting of Matlab and IT++ simulations with minimal changes to code.
People involved in this project.